1. Field of the Invention
This invention relates to a picture outputting apparatus for synthesizing a compressed moving picture and a background picture with a PC architecture as a basis. This application claims priority of Japanese Patent Application No. 2002-156273, filed on May 29, 2002, the entirety of which is incorporated by reference herein.
2. Description of Related Art
In a conventional video picture displaying apparatus, which is based on a personal computer (PC), an input compressed moving picture is decoded, using a video decoder board or a graphics accelerator, the so decoded moving picture and another picture are synthesized by a graphics outputting unit and a so synthesized picture is output on a display device as a display picture.
Referring to FIG. 6, the structure and the operation of the conventional apparatus for synthesizing pictures and outputting the resulting picture to a display device, are hereinafter explained. This apparatus is referred to below as a picture outputting apparatus 2.
The picture outputting apparatus 2, shown in FIG. 6, includes a data supply/storage unit 40, a data supply unit 41, a southbridge 42, an MPEG decoder 43, a northbridge 44, a RAM 45, a CPU 46, a graphics outputting unit 47, a RAM 48 and a RAM 49. The data supply/storage unit 40, connected to the southbridge 42, is a device for inputting/outputting data, including a compressed picture, such as a DVD drive, a HDD, a network module, a picture capture module or a tuner module. Meanwhile, plural data supply/storage units 40 may be connected to the southbridge 42. The data supply/storage unit 40 may also be connected to the southbridge 42 through an interface, such as IEEE 1394.
The data supply unit 41 is e.g., a tuner or an external input module, connected to the MPEG decoder 43 for directly transmitting a compressed picture to the MPEG decoder 43. The southbridge 42 is a bridge or a hub, such as ICH (I/O Controller Hub), to which are connected the northbridge 44 and the MPEG decoder 43. The southbridge 42 transforms data, supplied from the data supply/storage unit 40, into a predetermined signal format suited to the northbridge 44 and the MPEG decoder 43, and outputs the so transformed signals to the northbridge 44 and the MPEG decoder 43. The MPEG decoder 43 decodes the MPEG data supplied from the southbridge 42 or the data supply unit. The MPEG decoder 43 outputs the MPEG decoded data to the RAM 49. The RAM 49 memorizes the MPEG decoded data input from the MPEG decoder 43. The decoded MPEG data, stored in the RAM 49, is read out by a readout command from the CPU 46 and output to the southbridge 42.
The northbridge 44 is a bridge or a hub, such as MCH (Memory Controller Hub), connected to the RAM 45, CPU 46 and to the graphics outputting unit 47. The northbridge 44 transforms the MPEG data, decoded MPEG data or the graphics data, supplied from the southbridge 42, into a predetermined signal format suited to the equipment, to which the northbridge is connected, to output the so transformed data. The CPU 46 operates as a main processing unit for the picture outputting apparatus 2 for reading out data stored in the RAM 45, performing predetermined processing on the read-out data and for outputting the processed results through the northbridge 44 to the graphics outputting unit 47.
The graphics outputting unit 47 transforms the data, input through the northbridge 44, into a picture format suited to the display unit, to output the resulting data to the display unit. Meanwhile, a picture generated based on the decoded MPEG data is displayed on an area coated all-over with a key color by a chroma key for display on a predetermined site on the display unit.
In the above-described conventional picture outputting apparatus 2, the MPEG data needs to be decoded by the MPEG decoder 43 and subsequently routed over a connection line, such as PCI bus, through the southbridge 42 and the northbridge 44 to the graphics outputting unit 47, in order to transform the decoded MPEG data into a display picture and in order to output the resulting picture to the display unit.
Thus, if the decoded MPEG data is the large capacity data of the HDTV (High Definition Television) class, there is raised a problem that the bus between the MPEG decoder 43 and the southbridge 42 suffers from shortage in the frequency band.
If, in order to overcome this problem, part of the decoding processing for MPEG data, supplied from the data supply unit 41, is performed by the CPU 46, partly processed MPEG data is supplied to the graphics outputting unit 50 having a calculating unit for supporting the MPEG decoding and the remaining decoding is performed by the graphics outputting unit 50, as shown in FIG. 7, the load imposed on the CPU 46 is increased as a result of the CPU 46 taking over a part of the decoding processing. In addition, the frequency band of the bus between the northbridge 47 and the graphics outputting unit 47 tends to be wastefully consumed when the partially processed MPEG data is supplied from the northbridge 44 to the graphics outputting unit 50.
Moreover, when a first display picture represented by the decoded MPEG data is demonstrated on a display unit, this first display picture is demonstrated in an area coated all-over with the predetermined key color, so that, if the second display picture, represented by the picture data other than the MPEG data, is superposed on the first display picture, there is raised a problem that, in an area where the key color is the same as the color used in the second display picture, the background side first display image is displayed on the foreground, as shown in FIG. 5A.